(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of improving gate oxide quality and reliability in the fabrication of integrated circuits.
(2) Description of the Prior Art
In the fabrication of integrated circuits, a gate dielectric, typically silicon oxide, is grown on the surface of a monocrystalline silicon semiconductor substrate. A polysilicon layer is deposited overlying the gate oxide layer and patterned to form polysilicon gate electrodes. Upon implanting the gate polysilicon with boron or BF.sub.2, boron ions can penetrate the gate oxide layer causing a threshold voltage shift. Nitriding the gate oxide layer can prevent ion penetration. However, nitrogen incorporation into the gate oxide will degrade reliability in terms of charge-to-breakdown value (Q.sub.bd). It is desired to form a nitrided gate dielectric, such as silicon oxynitride that will not degrade Q.sub.bd.
Various patents describe methods of forming gate dielectric layers including silicon oxynitride. These include U.S. Pat. No. 5,407,870 to Okada et al, U.S. Pat. No. 5,464,792 to Tseng et al, U.S. Pat. No. 5,397,720 to Kwong et al, U.S. Pat. No. 5,464,783 to Kim et al, and U.S. Pat. No. 5,726,087 to Tseng et al. These patents teach methods of forming the oxynitride layers at atmospheric pressure (stated or implied) except for the patent to Kim et al which deposits silicon oxynitride by chemical vapor deposition (CVD) at 800.degree. C. and a pressure of 13 Pascals, which is 0.1 torr.